From 91f937ce7acb02249343b9eb66897e5b28092ef4 Mon Sep 17 00:00:00 2001 From: Thomas Karpiniec Date: Wed, 4 Jun 2025 11:27:47 +1000 Subject: [PATCH] Initial commit --- .gitignore | 1 + Cargo.lock | 7 +++++++ Cargo.toml | 6 ++++++ src/main.rs | 16 ++++++++++++++++ 4 files changed, 30 insertions(+) create mode 100644 .gitignore create mode 100644 Cargo.lock create mode 100644 Cargo.toml create mode 100644 src/main.rs diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..ea8c4bf --- /dev/null +++ b/.gitignore @@ -0,0 +1 @@ +/target diff --git a/Cargo.lock b/Cargo.lock new file mode 100644 index 0000000..9c1ed73 --- /dev/null +++ b/Cargo.lock @@ -0,0 +1,7 @@ +# This file is automatically @generated by Cargo. +# It is not intended for manual editing. +version = 4 + +[[package]] +name = "test-operator-impl" +version = "0.1.0" diff --git a/Cargo.toml b/Cargo.toml new file mode 100644 index 0000000..a5439b9 --- /dev/null +++ b/Cargo.toml @@ -0,0 +1,6 @@ +[package] +name = "test-operator-impl" +version = "0.1.0" +edition = "2024" + +[dependencies] diff --git a/src/main.rs b/src/main.rs new file mode 100644 index 0000000..388dfc1 --- /dev/null +++ b/src/main.rs @@ -0,0 +1,16 @@ +fn main() { + let m1 = MyType(3); + let m2 = MyType(5); + + assert_eq!(m1 & m2, MyType(1)); +} + +#[derive(Debug, PartialEq)] +struct MyType(u32); +impl std::ops::BitAnd for MyType { + type Output = MyType; + + fn bitand(self, rhs: Self) -> Self::Output { + Self(self.0 & rhs.0) + } +} \ No newline at end of file -- 2.39.5